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Global Mixed-mode Technology Inc.
G1422
2W Stereo Audio Amplifier
Features
Depop Circuitry Integrated Output Power at 1% THD+N, VDD=5V --2W/CH (typical) into a 4 Load --1.2W/CH (typical) into a 8 Load Bridge-Tied Load (BTL), Single-Ended (SE) Shutdown Control Available Thermal protection Surface-Mount Power Package 20-Pin TSSOP-P
General Description
The G1422 is a stereo audio power amplifier in 20pin TSSOP thermal pad package. It can drive 2W continuous RMS power into 4 load per channel in Bridge-Tied Load (BTL) mode at 5V supply voltage. Its THD is smaller than 1% under the above operation condition. To simplify the audio system design in the notebook application, the G1422 supports the BridgeTied Load (BTL) mode for driving the speakers, Single-End (SE) mode for driving the headphone. For the low current consumption applications, the SHDN mode is supported to disable the G1422 when it is idle. The current consumption can be further reduced to below 2A.
Applications
Stereo Power Amplifiers for Notebooks or Desktop Computers Multimedia Monitors Stereo Power Amplifiers for Portable Audio Systems
Ordering Information
ORDER NUMBER
G1422F2U Note:F2: TSSOP-20 (FD) U: Tape & Reel
ORDER NUMBER (Pb free)
G1422F2Uf
MARKING
G1422
TEMP. RANGE
-40C to +85C
PACKAGE
TSSOP-20 (FD)
Pin Configuration
G1422
SHUTDOWN GND/HS +OUTA VDD -OUTA -INA GND/HS +INA GND/HS 1 2 3 4 5 6 7 8 9 19 18 17 16 15 14 13 12 20 HP-IN GND/HS +OUTB VDD -OUTB -INB BYPASS +INB GND/HS
Thermal Pad
GND/HS 10
11 GND/HS
Top View TSSOP-20 (FD)
Bottom View
Note: Recommend connecting the Thermal Pad to the GND for excellent power dissipation.
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Absolute Maximum Ratings
Supply Voltage, VCC.............................................6V Operating Ambient Temperature Range TA...................................................-40C to +85C Maximum Junction Temperature, TJ...................150C Storage Temperature Range, TSTG.......-65C to+150C Reflow Temperature (soldering, 10sec)............260C
G1422
Power Dissipation (1) TA 25C.................................................2.7W TA 70C.................................................1.7W TA 85C.................................................1.4W Electrostatic Discharge, VESD Human body mode...........................-3000 to 3000(2)
Note:
(1) (2)
: Recommended PCB Layout : Human body model : C = 100pF, R = 1500, 3 positive pulses plus 3 negative pulses
Electrical Characteristics
DC Electrical Characteristics, VDD = 5.0V, TA=+25C, unless otherwise noted PARAMETER
Supply Current DC Differential Output Voltage IDD in Shutdown Headphone High Input Voltage Headphone Low Input Voltage
SYMBOL
IDD VO(DIFF) ISD VIH VIL VDD = 5V
CONDITION
Stereo BTL STEREO SE VDD = 5V,Gain = 2 VDD = 5V
MIN
--------4 ---
TYP
8.5 4 5 0.1 -----
MAX
15 8 50 2 --0.8
UNIT
mA mV A V V
(AC Operation Characteristics, VDD = 5.0V, TA=+25C, RL = 4, unless otherwise noted) PARAMETER SYMBOL CONDITION
THD = 1%, BTL, RL = 4 THD = 1%, BTL, RL = 8 THD = 10%, BTL, RL = 4 Output power (each channel) see Note P(OUT) THD = 10%, BTL, RL = 8 THD = 1%, SE, RL = 4 THD = 1%, SE, RL = 8 THD = 10%, SE, RL = 4 THD = 10%, SE, RL L = 8 THD = 0.5%, SE, RL = 32 PO = 1.6W, BTL, RL = 4 Total harmonic distortion plus noise THD+N PO = 1W, BTL, RL = 8 PO = 75mW, SE, RL = 32 VI = 1V, RL = 10K, G = 1, SE G = 1, THD = 1% RL = 4, Open Load f = 120Hz f = 1kHz
MIN
---------------------------------------------
TYP
2 1.25 2.5 1.6 550 340 700 440 92 300 100 15 2.5 20 65 75 80 80 85 2 90 55
MAX
---------------------------------------------
UNIT
W
mW
m%
Maximum output power bandwidth Phase margin Power supply ripple rejection Channel-to-channel output separation Input separation BTL attenuation in SE mode Input impedance Signal-to-noise ratio Output noise voltage
BOM PSRR
kHz dB dB dB dB M dB V (rms)
ZI Vn PO = 500mW, BTL Output noise voltage
Note :Output power is measured at the output terminals of the IC at 1kHz.
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Typical Characteristics
Table of Graphs
G1422
FIGURE
2,4,6,9,11,15,17 1,3,5,7,8,10,12,13,14,16,18 20 19 22,23 21 24 25,26 27,28 29,30,31,32
THD +N Total harmonic distortion plus noise Output noise voltage Vn Supply ripple rejection ratio Crosstalk Open loop response IDD PO PD Supply current Output power Power dissipation
vs Frequency vs Output Power vs Frequency vs Frequency vs Frequency vs Frequency Vs Supply Voltage vs Load Resistance Vs Load Resistance vs Output Power
Total Harmonic Distortion Plus Noise vs Output Power
10 5 10 5
Total Harmonic Distortion Plus Noise vs Frequency
20kHz
2 1 0.5 % 0.2 0.1 0.05
2 1
Po=1.8W
1kHz
%
0.5
0.2
20 Hz
0.02 0.01 3m
VDD=5V RL=3 BTL Av=-2V/V
20m 50m 100m W 200m 500m 1 2 3
0.1 0.05
0.02 0.01 20
VDD=5V RL=3 BTL Av=-2V/V
50 100 200 500 Hz 1k 2k 5k 10k 20k
5m
10m
Figure 1
Figure 2
Total Harmonic Distortion Plus Noise vs Output Power
10 5 10 5
Total Harmonic Distortion Plus Noise vs Frequency
Av=-4V/V Av=-2V/V
20kHz
2 1 0.5 % 0.2 0.1 0.05
2 1
1kHz
%
0.5
0.2
20 Hz
0.02 0.01 3m
VDD=5V RL=4 BTL Av=-2V/V
10m 20m 50m 100m W 200m 500m 1 2 3
0.1 0.05
Av=-1V/V
0.02 0.01 20
VDD=5V RL=4 BTL Po=2W
200 500 Hz 1k 2k 5k 10k 20k
5m
50
100
Figure 3
Figure 4
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Total Harmonic Distortion Plus Noise vs Output Power
10 5 10
G1422
Total Harmonic Distortion Plus Noise vs Frequency
20kHz
2 1 0.5 % 0.2 0.1 0.05
VDD=5V RL=8 BTL Av=-2V/V
5
2 1 0.5
VDD=5V RL=8 BTL Po=1W
Av=-4V/V
1kHz
% 0.2 0.1
Av=-2V/V
20 Hz
0.05
0.02 0.01 2m
0.02 0.01 20
Av=-1V/V
50 100 200 500 Hz 1k 2k 5k 10k 20k
5m
10m
20m
50m W
100m
200m
500m
1
2
Figure 5
Figure 6
Total Harmonic Distortion Plus Noise vs Output Power
10 5 10
Total Harmonic Distortion Plus Noise vs Frequency
5
2 1 0.5 % 0.2 0.1 0.05
20kHz
VDD=5V RL=32 BTL Av=-2V/V
20kH
2 1 0.5 % 0.2
1kHz
1kHz
0.1 0.05
0.02 0.01 1m
20 Hz
2m 5m 10m 20m W 50m 100m 200m 500m 1
0.02 0.01 1m
VDD=3.3V RL=4 BTL Av=-2V/V
2m 5m 10m
20 Hz
20m W
50m
100m
200m
500m
1
Figure 7
Figure 8
Total Harmonic Distortion Plus Noise vs Frequency
10 5 10
Total Harmonic Distortion Plus Noise vs Output Power
5
2 1 0.5 % 0.2 0.1 0.05
VDD=3.3V RL=4 BTL Po=0.75W
Av=-4V/V
2 1 0.5
20kHz
Av=-2V/V
% 0.2 0.1 0.05
1kHz
0.02 0.01 20
Av=-1V/V
50 100 200 500 Hz 1k 2k 5k 10k 20k
0.02 0.01 1m
VDD=3.3V RL=8 BTL Av=-2V/V
2m 5m 10m
20 Hz
20m W
50m
100m
200m
500m
1
Figure 9
Figure 10
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G1422
Total Harmonic Distortion Plus Noise vs Output Power
Total Harmonic Distortion Plus Noise vs Frequency
10 5 10
2 1 0.5 % 0.2 0.1 0.05
VDD=3.3V RL=8 BTL Po=0.45W
5
2
20kHz
Av=-4V/V
%
1 0.5
VDD=5V RL=4 SE Av=-2V/V
0.2
1kHz
Av=-2V/V
0.1 0.05
0.02 0.01 20
Av=-1V/V
50 100 200 500 Hz 1k 2k 5k 10k 20k
0.02
100Hz
2m 5m 10m 20m W 50m 100m 200m 500m 1
0.01 1m
Figure 11
Figure 12
Total Harmonic Distortion Plus Noise vs Output Power
10 5 10
Total Harmonic Distortion Plus Noise vs Output Power
5
2 1 0.5 % 0.2 0.1 0.05
VDD=5V RL=8 SE Av=-2V/V 20kHz
%
2 1 0.5
VDD=5V RL=16 SE Av=-2V/V 20kHz
0.2
1kHz
0.1 0.05
20 Hz 1kHz
2m 5m 10m 20m W 50m 100m 200m 500m
0.02
100kHz
2m 5m 10m 20m W 50m 100m 200m 500m 1
0.02 0.01 1m
0.01 1m
Figure 13
Figure 14
Total Harmonic Distortion Plus Noise vs Frequency
10 5 10 5
Total Harmonic Distortion Plus Noise vs Output Power
VDD=5V RL=32 SE Av=-2V/V 20kHz
2 1 0.5 % 0.2 0.1 0.05
VDD=5V RL=16 SE Po=150mW Av=-4V/V
%
2 1 0.5
0.2 0.1 0.05
Av=-2V/V
1kHz
20 Hz
0.02 0.01 20
Av=-1V/V
50 100 200 500 Hz 1k 2k 5k 10k 20k
0.02 0.01 1m
2m
5m
10m
20m W
50m
100m
200m
500m
1
Figure 15
Figure 16
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Total Harmonic Distortion Plus Noise vs Frequency
10 5 2 1 0.5 0.2 % 0.1 0.05 0.02 0.01 0 .005 0 .002 0 .001 20 50 100 200 50 0 Hz 1k 2k 5k 10k 20 k % 10
G1422
VDD=3.3V RL=32 SE Av=-2V/V
Total Harmonic Distortion Plus Noise vs Output Power
5 2 1
VDD=5V RL=32 SE Po=75mW
Av=-4V/V
0.5 0.2 0.1 0.05 0.02 0.01
20kHz
Av=-2V/V
20 Hz 1kHz
Av=-1V/V
0.005 0.002 0.001 1m 2m 5m 10 m W 2 0m 5 0m 100m
Figure 17
Figure 18
Supply Ripple Rejection Ratio vs Frequency
+0 -10 -20 -30 -40 d B -50 -60 -70 -80 -90 -100 20 V
Output Noise Voltage vs Frequency
100u 90u 80u 70u 60u 50u 40u
T
VDD=5V RL=4 CB=4.7F Vripple=0.5Vpp
VDD=5V RL=4 BTL Mode 20kHz LP
30u
SE Mode
20u
VDD=5V RL=32 SE Mode BW<32kHz
BTL Mode
50 100 200 500 Hz 1k 2 k 5k 10k 2 0k 10u 20 50 100 200 50 0 Hz 1k 2k 5k 10k 20 k
Figure 19
Figure 20
Open Loop Response
-30 -35 -40 -45 -50 -55 -60 d B -65 -70 -75 -80 -85 -90 -95 -100 20 50
Channel Separation
VDD=5V Po=1.5W RL=4 BTL
Channel A to B
Channel B to A
100
200
500 Hz
1k
2k
5k
10k
20k
Figure 21
Figure 22
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G1422
Stereo BTL
Channel Separation
-30 -35 -40 -45 -50 -55 -60 d B -65 -70 -75 -80 -85 -90 -95 -100 20 50 100 200
Supply Current vs Supply Voltage
9
Supply Current(mA)
VDD=5V Po=75mW RL=32 SE
8 7 6 5 4 3 Channel B to A
500 Hz 1k 2k 5k 10k 20k
Channel A to B
Stereo SE
2 3 4 5 Supply Voltage(V) 6
Figure 23
Figure 24
Output Power vs Supply Voltage
3 2.5 Output Power(W) 2 1.5 1 RL=8 0.5 0 2.5 3.5 4.5 5.5 Supply Voltage(V) 6.5 RL=3 THD+N=1% BTL Each Channel RL=4
0.25
Output Power vs Supply Voltage
THD+N=1% SE Each Channel
0.2
Output Power(W)
0.15
RL=16
0.1
0.05
RL=32
0
2.5
3.5
4.5 Supply Voltage(V)
5.5
6.5
Figure 25
Figure 26
Output Power vs Load Resistance
2.5 THD+N=1% BTL Each Channel VDD=5V 1.5 Output Power(W) 0.7 0.6 0.5 0.4 0.3 0.2 0.1 VDD=3.3V 0 0 10 20 30 Load Resistance() 40 0 4
Output Power vs Loard Resistance
THD+N=1% SE Each Channel VDD=5V
2 Output Power(W)
1
0.5
VDD=3.3V 8 12 16 20 24 28 32
Load Resistance()
Figure 27
Figure 28
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Power Dippipation vs Output Power
1.8 1.6 1.4 Power Dissipation 1.2 1 0.8 0.6 0.4 0.2 0 0 0.5 1 1.5 Po-Output Pow er(W) 2 2.5 RL=8 RL=4 VDD=5V BTL Each Channel RL=3 Power Dissipation(W) 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 0.5 1 Po-Output Pow er(W) RL=8 VDD=3.3V BTL Each Channel RL=4 RL=3
G1422
Power Dissipation vs Output Power
1.5
Figure 29
Figure 30
Power Dissipation vs Output Power
0.35 0.3 0.16 0.14
Power Dissipation vs Output Power
RL=4
Power Dissipation(W)
0.25 0.2 0.15 0.1 0.05 0
RL=4 RL=8
Power Dissipation(W)
0.12 0.1 0.08 0.06 0.04 0.02 0
RL=8
VDD=3.3V SE Each Channel
RL=32
VDD=5V SE Each Channel
RL=32
0
0.2
0.4 Po-Output Pow er(W)
0.6
0.8
0
0.1
0.2
0.3
Po-Output Pow er(W)
Figure 31
Figure 32
Recommended Minimum Footprint
TSSOP-20 (FD)
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Pin Description
PIN
1 2,7,9,10,11,12,19 3 4,17 5 6 8 13 14 15 16 18 20 Thermal Pad
G1422
NAME
SHUTDOWN GND/HS +OUTA VDD -OUTA -INA +INA +INB BYPASS -INB -OUTB +OUTB HP-IN
I/O
I
FUNCTION
Shutdown mode control signal input, places entire IC in shutdown mode when held high, IDD is below 2A. Ground connection for circuitry, directly connected to thermal pad. A channel + output in BTL mode, high impedance state in SE mode Supply voltage for circuitry. A channel - output in BTL mode, - output in SE mode. A channel input signal I, selected when MUXCTRL is held low. A channel positive input of OPAMP, biasing DC operation of OPAMP B channel positive input of OPAMP, biasing DC operation of OPAMP Connect to voltage divider for internal mid-supply bias. B channel input signal I, selected when MUXCTRL is held low. B channel - output in BTL mode, - output in SE mode. B channel + output in BTL mode, high impedance state in SE mode Mode control signal input, hold low for BTL mode, hold high for SE mode. Recommend connecting the Thermal Pad to the GND for excellent power dissipation.
O O I I I I O O I
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Block Diagram
20k
G1422
6
-INA
_
-OUT +OUT
5 3
8 14
+INA BYPASS
+
VDD
4,17
1
SHUTDOWN
BIAS CIRCUITS MODES CONTROL CIRCUITS
HP-IN
20
13
+INB
+
+OUTB -OUTB
18 16
15
-INB
_
20k
Parameter Measurement Information
1
SHUTDOWN HP-IN 20
14
BYPASS VDD 4,17 RL 4/8/32
8 CB 4.7F CI AC source RI 6
+INA
+
-INA
-OUTA +OUTA
5 3
_
RF
BTL Mode Test Circuit
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Parameter Measurement Information (Continued)
G1422
1 SHUTDOWN HP-IN 14 BYPASS VDD 4,17 8 CB 4.7F CI AC source RI RL 32 6 -INA +INA 20 VDD
+ _
-OUTA +OUTA
5 3
RF
SE Mode Test Circuit
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Application Circuits
PHONEJACK
G1422
R1 1K COA 100F
R2 1K COB 100F
1 2 SPEAKER 3
SHUTDOWN GND
HP-IN GND +OUTB
20 19
R4 100K 0.1F R3 100K SPEAKER
+OUTA
18
4 RFA1 20K CA1 1F RCA RA1 20K
VDD
VDD
17 RFB1 20K RB1 20K CS 1F CB1 1F RCA
5
-OUTA
-OUTB
16
6
-INA
G1422
-INB
15
7
GND
BYPASS
14 CB 0.33F
8
+INA
+INB
13
9
GND
GND
12
10
GND
GND
11
Logical Truth Table INPUTS HP-IN
X Low Low High High
Shutdown
High Low Low Low Low
A/B Out---BTL Output BTL Output SE Output SE Output
AMPLIFIER STATES A/B Out+
---BTL Output BTL Output -------
Mode
Mute BTL BTL SE SE
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Application Information
Single Ended Mode Operation The G1422 can drive clean, low distortion SE output power into headphone loads (generally 16 or 32) as in Figure A. Please refer to Electrical Characteristics to see the performances. A coupling capacitor is needed to block the dc offset voltage, allowing pure ac signals into headphone loads. Choosing the coupling capacitor will also determine the 3 dB point of the high-pass filter network, as Figure B. fC=1/(2RLCC) For example, a 68uF capacitor with 32 headphone load would attenuate low frequency performance below 73Hz. So the coupling capacitor should be well chosen to achieve the excellent bass performance when in SE mode operation.
G1422
Bridged-Tied Load Mode Operation The G1422 has two linear amplifiers to drive both ends of the speaker load in Bridged-Tied Load (BTL) mode operation. Figure C shows the BTL configuration. The differential driving to the speaker load means that when one side is slewing up, the other side is slewing down, and vice versa. This configuration in effect will double the voltage swing on the load as compared to a ground reference load. In BTL mode, the peak-to-peak voltage VO(PP) on the load will be two times than a ground reference configuration. The voltage on the load is doubled, this will also yield 4 times output power on the load at the same power supply rail and loading. Another benefit of using differential driving configuration is that BTL operation cancels the dc offsets, which eliminates the dc coupling capacitor that is needed to cancelled dc offsets in the ground reference configuration. Low-frequency performance is then limited only by the input network and speaker responses. Cost and PCB space can be minimized by eliminating the dc coupling capacitors.
VDD
VDD
Vo(PP)
Vo(PP)
VDD
CC RL Vo(PP)
RL
2xVo(PP) -Vo(PP)
Figure A
Figure C
-3 dB
fc
Figure B
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SHUTDOWN Mode Operations The G1422 implements the shutdown mode operations to reduce supply current, IDD, to the absolute minimum level during nonuse periods for battery-power conservation. When the shutdown pin (pin 1) is pulled high, all linear amplifiers will be deactivated to mute the amplifier outputs. And The G1422 enters an extra low current consumption state, IDD is smaller than 2A. Shutdown pin should never be left unconnected, this floating condition will cause the amplifier operations unpredictable.
Optimizing DEPOP Operation
G1422
De-popping circuitry of theG1422 is shown on Figure D. The PNP transistor limits the voltage drop across the 225k by slewing the internal node slowly when power is applied. At start-up, the voltage at BYPASS capacitor is 0. The PNP is ON to pull the mid-point of the bias circuit down. So the capacitor sees a lower effective voltage, and thus the charging is slower. This appears as a linear ramp (while the PNP transistor is conducting), followed by the expected exponential ramp of an R-C circuit.
VDD 100 k 225 k Bypass 100 k
Circuitry has been implemented in the G1422 to minimize the amount of popping heard at power-up and when coming out of shutdown mode. Popping occurs whenever a voltage step is applied to the speaker and making the differential voltage generated at the two ends of the speaker. To avoid the popping heard, the bypass capacitor should be chosen promptly, 1/(CBx100k) 1/(CI*(RI+RF)). Where 100k is the output impedance of the mid-rail generator, CB is the mid-rail bypass capacitor, CI is the input coupling capacitor, RI is the input impedance, RF is the gain setting impedance which is on the feedback path. CB is the most important capacitor. Besides it is used to reduce the popping, CB can also determine the rate at which the amplifier starts up during startup or recovery from shutdown mode.
Figure D
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Package Information
D C L D1 E1 E
G1422
E2
H
0.127 TYP
A2 A1 e b
A
0.05
TSSOP-20 (FD) Package Note: 1. JEDCE outline: MP-153 AC/MO-153 ACT (thermally enhanced variations only) 2. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs shall not exceed 0.15 per side. 3. Dimension "E1" does not include interlead flash or protrusion. Interlead flash or protrusion shall not exceed 0.25 per side. 4. Dimension "b" does not include dambar protrusion. Allowable dambar protrusion shall be 0.08mm total in excess of the "b" dimension at maximum material conditions. Dambar cannot be located on the lower radius of the foot. Minimum space between protrusion and adjacent lead is 0.07mm. 5. Dimensions "D" and "E1" to be determined at datum plane "H". SYMBOLS
A A1 A2 b C D D1 E E1 E2 e L
MIN
----0.00 0.80 0.19 0.20 6.40 3.90 4.30 2.70 0.45 0
DIMENSION IN MM NOM
--------1.00 --------6.50 ----6.40 BSC 4.40 ----0.65 BSC 0.60 -----
MAX
1.20 0.15 1.05 0.30 ----6.60 4.40 4.50 3.20 0.75 8
MIN
----0.000 0.031 0.007 0.008 0.252 0.154 0.169 0.106 0.018 0
DIMENSION IN INCH NOM
--------0.039 --------0.256 ----0.252 BSC 0.173 ----0.026 BSC 0.024 -----
MAX
0.047 0.006 0.041 0.012 ----0.260 0.173 0.177 0.126 0.030 8
Taping Specification
PACKAGE
TSSOP-20 (FD)
Feed Direction Typical TSSOP Package Orientation
GMT Inc. does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and GMT Inc. reserves the right at any time without notice to change said circuitry and specifications.
Q'TY/BY REEL
2,500 ea
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